1. Field of the Invention
The present invention is directed to a method for controlling the write-in and read-out of data signals transmitted serially or in parallel on a network packet-oriented with a determined maximum plurality of bits per packet into and out of a buffer cyclically addressable by memory location and provided with data input and data output in a station connected to the network via a network access controller. The processing clock frequency of the station approximately corresponds to the serial or parallel data bit clock rate, whereby a packet start bit combination and a packet end bit combination and/or bit combinations indicating stuffing information between the data packets are insertable and the size of the buffer is adapted to the maximum deviation between the processing clock frequency and the data transmission rate as well as to the maximally-occurring jitter.
2. Description of the Prior Art
An exchange of digital data signals is occurring to an increasing degree in communications and in data processing technology at transfer locations or, respectively, interfaces between systems, system components, etc., for example between two subscriber stations connected to a public or private network. In terms of bit clock frequency and phase relation, the data signals transmitted from one system to another system and received at the latter usually do not agree with the bit clock frequency and phase relation of the processing clock of the receiving system. These deviations are primarily caused by the clock frequency deviations of the clock oscillators implemented in the systems. When the distance between the two systems requires a transmission of the data signals by way of standard transmission technology then, caused for example by noise voltage influences, transient responses in synchronizing devices, etc., the bit clock frequency deviations can slightly increase and the phase fluctuations, also referred to as jitter, can considerably increase. The jitter is generally defined as phase fluctuation about the characteristic points in time of a digital signal or, respectively, about the ideal, equidistant points in time. A possibility of matching the bit clock frequency and the phase relation of the data signals to that of the processing clock of the receiving system is represented by the insertion of a buffer between the transfer location and the further-processing system components. The received data signals are thereby written into the buffer memory with the data bit clock derived from the data signals and are, in turn, read out from the buffer with the processing system clock after a prescribed time adapted to the maximum clock frequency and phase deviation. The write-in and read-out usually occurs with devices which generate memory location addresses and produce write-in and read-out signals, the write-in and read-out and address inputs of the buffer being selected with these devices. The write-in or, respectively, read-out procedure is usually initialized by a specific initialization procedure which sequences before the write-in or, respectively, read-out event. Buffers controlled in this manner are known, for example, from time-division multiplex data transmission systems, particularly pulse code modulation (PCM) transmission systems, or from access equipment of data processing systems, whereby the data signals may also exist in parallel and the adaptation then occurs in a parallel buffer, for example in a 1-byte buffer. The introduction of packet-oriented data transmission or, respectively, processing technology and, therefore, of the burst or, respectively, packet transmission of data signals requires initialization and termination procedures of the write-in and read-out events of the buffer adapted to this technology given simultaneous consideration of continuously increasing transmission rates of the data signals. A predetermined packet start or, respectively, packet end bit combination defines the beginning and, respectively, end of an individual data packet. Bit combinations indicating stuffing information can be inserted between the individual data packets in order to recognize, for example, operational or down status.